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guitu

1 Rookie

 • 

3 Posts

55

February 28th, 2024 21:17

N2024 fail to boot

The Status light is red. The booting stucks on this 'Micron MT29F2G08ABAEA'. Can I fix by myself? Thanks.

....

Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA,

1 person also has this problem

DELL-Joey C

Moderator

 • 

3.2K Posts

February 29th, 2024 03:46

Hi,

 

Unfortunately no, you will have to replace the switch as the flash is corrupted, and it is not possible to recover/repaired. 

sitetechFL

1 Rookie

 • 

3 Posts

May 23rd, 2024 03:14

C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x80000155
DCO code: 21
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x8000014a
DCO code: 20
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 



?
?


























U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x8000014c
DCO code: 20
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 
















































U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x8000013b
DCO code: 19
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 
exit
end
good
boot
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x80000150
DCO code: 21
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x80000152
DCO code: 21
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x80000153
DCO code: 21
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 
exit diag
run boot
help
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x80000139
DCO code: 19
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 
9
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x80000150
DCO code: 21
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x80000151
DCO code: 21
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x80000135
DCO code: 19
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x80000139
DCO code: 19
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters [Warning: "FFh 0Dh" is a byte sequence outside the Unicode basic multilingual plane (plane 0)! Only Unicode plane 0 is supported by .NET Framework and thus YAT (yet).]
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x80000139
DCO code: 19
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x8000013b
DCO code: 19
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x8000013b
DCO code: 19
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... [Warning: "FFh 0Dh" is a byte sequence outside the Unicode basic multilingual plane (plane 0)! Only Unicode plane 0 is supported by .NET Framework and thus YAT (yet).]
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x8000013c
DCO code: 19
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x8000013d
DCO code: 19
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 




reset
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x80000144
DCO code: 20
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x80000136
DCO code: 19
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 
U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x8000013d
DCO code: 19
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 

U-Boot SPL 2012.10-00077-g89d3a3e (Mar 18 2014 - 13:11:33)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x80000155
DCO code: 21
PASS
=========================================
HWRev: 0xb5 AVS: 0x0 VOUT Init: 0x64 VOUT Set: 0x64 
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
 Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:   chipsize 



***WHAT IS WRONG ?***

DELL-Joey C

Moderator

 • 

3.2K Posts

May 23rd, 2024 09:21

Hi,

 

I've responded to one of the post that you have commented, https://dell.to/3Vcm5yk

 

You may want to raise a case with the support to guide restore the flash firmware through uboot menu. If the restore is not successful, the switch need to be replaced. 

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