Dell Latitude 7424 Rugged Extreme Service Manual

The Intel I219LM Jacksonville WGI219LM family of Gigabit Ethernet controllers provides compact, single-port integrated physical layer devices that connect to the Intel Skylake chipsets.

The Intel WGI219LM is the corporate LAN product with support for Intel vPro; technology, Intel AMT2, Energy Efficient Ethernet (802.3az), Intel SIPP, and Server OS support.

Product Features

General

• 10 BASE-T IEEE 802.3 specification conformance
• 100 BASE-TX IEEE 802.3 specification conformance
• 1000 BASE-T IEEE 802.3 specification conformance
• Energy Efficient Ethernet (EEE)
• IEEE 802.3az support [Low Power Idle (LPI) mode]
• IEEE 802.3u autonegotiation conformance
• Supports carrier extension (half duplex)
• Loopback modes for diagnostics
• Advanced digital baseline wander correction
• Automatic MDI/MDIX crossover at all speeds of operation
• Automatic polarity correction
• MDC/MDIO management interface
• Flexible filters in PHY to reduce integrated LAN controller power
• Smart speed operation for automatic speed reduction on faulty cable plants
• PMA loopback capable (no echo cancel)
• 802.1as/1588 conformance
• Power Optimizer Support
• Intel Stable Image Platform Program (SIPP)
• Network proxy/ARP Offload support
• Up to 32 programmable filters
• No support for Gb/s half-duplex operation

Security and Manageability

• Intel vPro support with appropriate Intel chipset components

Performance

• Jumbo Frames (up to 9 Kb)
• 802.1Q & 802.1p
• Receive Side Scaling (RSS)
• Two Queues (Tx & Rx)

Power

• Ultra Low Power at cable disconnect (<1 mW) enables platform support for connected standby
• Reduced power consumption during normal operation and power down modes
• Integrated Intel Auto Connect Battery Saver (ACBS)
• Single-pin LAN disable for easier BIOS implementation
• Fully integrated Switching Voltage Regulator (iSVR)
• Low Power LinkUp(LPLU)

MAC/PHY Interconnect

• PCIe-based interface for active state operation (S0 state)
• SMBus-based interface for host and management traffic (Sx low power state)

Package/Design

• 48-pin package, 6x6mm with a 0.4 mm lead pitch and an Exposed Pad for ground
• Three configurable LED outputs
• Integrated MDI interface termination resistors to reduce BOM costs
• Reduced BOM cost by sharing SPI flash with PCH