Memory optimized
independent channel mode
This mode supports Single Device Data Correction
(SDDC) only for memory modules that use x4 device width. It does not
impose any specific slot population requirements.
Table 1. Memory optimized
independent channel mode Memory installation guidelines for memory optimized
(independent channel) mode.
Processor
Configuration
Memory population rules
Memory population information
Single CPUNOTE: Optimized mode permits
unbalanced configurations, eg, 1:1:1:0 DIMM per channel (DPC) combinations.
Optimized (independent channel)
1, 2, 3,
4
Populate in this order, odd amount of DIMMs per
CPU allowed.
Dual CPUNOTE: Populate round robin
starting with CPU1:
NOTE: Optimized mode permits
unbalanced configurations, eg, 2:1:1:1 DPC combinations.
Optimized (independent channel)
C1{1}, C2{1},
C1{2}, C2{2}, C1{3}, C2{3}…
Populate in this order, odd amount of DIMMs per
CPU allowed.
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